为明天的连接设备加速SoC设计

Until now, digital home devices such as DTVs, set-top boxes and Blu-ray players have primarily been closed systems with limited applications such as program guides, DVR and service messages. Next-generation DTVs, STBs and digital media adaptors will be centered around accessing content on any device from diverse sources—local devices, networks and the cloud.

Through the full and rich internet experience enabled by software platforms such as Android, Adobe Flash Player, Google Chrome, Skype, Yahoo! TV Widgets and others, these devices will become compelling platforms for accessing, storing and sharing music, video, cloud-based applications and more. Digital home products will also be capable of seamlessly interacting with each other and with smart mobile devices. As devices become increasingly interconnected and internet-connected, this presents a new level of complexity for SoC and system developers.

Software has become a significant factor for SoC functionality. Selecting IP that that has a strong eco-system of supporting CODEC’s, tools and operating systems will significantly speed up the SoC development process.

Mr. Vij will share his vision for the connected home of tomorrow. He will then provide a brief overview of software and hardware requirements for the SoCs that will drive the products of tomorrow. Finally, Mr. Vij will discuss how the right combination of IP with the right supporting ecosystem can speed SoC design in this increasingly complex environment.

演讲者：
Sandeep Vij
President and Chief Executive Officer
MIPS Technologies

Mr. Vij brings to MIPS Technologies more than 20 years of senior-level management and marketing experience in the semiconductor industry. Prior to joining MIPS, he was Vice President and General Manager of the Broadband and Consumer Division of Cavium Networks, a leading provider of highly-integrated semiconductor products that enable intelligent processing in networking, communications, and connected home applications.

Prior to Cavium, Mr. Vij was on the executive staff of Xilinx Inc. for 12 years, where he was instrumental in growing the company’s business by 3X to over $1.8 billion per year and enabling it to become the industry’s largest programmable logic vendor. Mr. Vij also held roles at Xilinx as Vice President and General Manager of its General Products Division, and Vice President of Worldwide Marketing, Services and Support. Prior to Xilinx, Mr. Vij spent five years in various senior roles at Altera Corporation.

Mr. Vij is a graduate of General Electric’s Edison Engineering Program and Advanced Courses in Engineering. He sits on the Board of Directors of Coherent Inc. He holds an MSEE from Stanford University and a BSEE from San Jose State University.

Areas of Expertise
• Connected digital home including set-top boxes, DTVs, digital cameras
• Wired and wireless networking technologies
• Mobile infrastructure and products including smartphones
• Microprocessors and microcontrollers
• Programmable logic
• Creating high performance corporate cultures
• Business strategy

中国IC设计产业的前景预测和产品定位变化

摘要：
中国IC设计业在过去10年中取得了重要的进步。销售额占全球芯片设计业销售总额的比例从2000年的近乎为零，快速攀升到2009年的约10%。在全球金融危机的背景下，2009年中国IC设计业逆势而上，录得近15%的增长率。可以乐观的预计，未来5年中国IC设计业还将保持快速增长的态势，全球份额进一步加大，产品档次持续提升，企业竞争力不断增强。未来5年是集成电路技术出现重大转折的关键时期，技术进步将引发产品形态的根本性变化，产业格局调整的力度将随之加大。中国IC设计业在坐拥难得发展机遇的同时，也面临巨大的挑战。夯实基础，提升能力，持续创新将是主旋律。

演讲者：
魏少军，博士，清华大学、北京大学双聘教授

未来两年最热门电子产品及本土IC机遇

演讲者：
Alice sun 孙昌旭
Principal Analyst 首席分析师
EET china 电子工程专辑
ED china  电子系统设计
ESMC    国际电子商情

孙昌旭，环球资源电子组首席分析师，拥有16年记者、编辑、分析师经验，多年来跟踪报导通信、微电子及相关产业，撰写几百篇文章，所写文章在业界影响深远。目前是电子业知名博客，累积几百万流量。

在过去的16年中，孙昌旭积累了与国际IC公司、本土IC公司以及港台IC公司的紧密关系，把握产业最新技术；同时孙昌旭也与终端厂商和系统厂商之间拥有较好的合作关系，了解市场需求。对于电子元器件分销商和设计服务公司这类重要的中间环节供应商，孙昌旭也非常了解。她主导并参与了《中国电子元器件分销商调查》和《中国IC公司调查》。

孙昌旭毕业于武汉科技大学，主修机电工程专业。
 

Manufacturing-Driven Design Tool Innovations: 2010

摘要：
The status of tape-out design tools is described for the 28nm node. As usual, ICs are increasing in transistor count and design complexity. In addition, a set of additional manufacturing effects and design practices for this node drove DRC, LVS, and Parasitic Extraction R&D. The 2009-2010 updates to this fundamental tool set are now in production use. This presentation will describe the design and manufacturing drivers and the resultant innovations now in production for advanced IC signoff. The design drivers include the increased use of multiple voltage domains and power operation modes and the increased use of semiconductor IP from different sources; the manufacturing drivers include higher leakage currents, more heavily weighted interconnect (vs. device) parasitics, increased lithography effects, and a collection of more pronounced process variability effects. The innovations in tape-out design tools in response to these drivers include: the tight integration of physical design (place and route) and verification, the introduction of pattern-based design rule checking, automatic waiver management, 3D design verification (e.g., Through Silicon Vias), high accuracy/high performance field solver extraction technology and programmable electrical rule checking. Together, these advances can make a significant difference in the time it takes to get a new IC product to market.

演讲者：
Dr. Andrew Moore is the PacRim Regional Technical Director at Mentor Graphics. Andrew has held executive level positions at Mentor, Luminescent Technologies, and at TSMC. He received his BSEE from the University of Illinois at Urbana-Champaign, and his Ph.D. from Caltech.